Why is there a taper in the conducting channel for a NMOS MOSFET?

1. The problem statement, all variables and given/known data
So in Triode Mode, there is a taper in the conducting channel as shown in this slide:

My guess is that as we increase Vds, it will cause more electrons to be attracted to the right n region and thus the concentration of electrons on the right side of the channel will be smaller, hence the taper.

I feel like there could be a better theoretical reasoning to this. Could someone please explain this to me with greater detail and possibly as simple as possible 😛


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