Application Engineer, Munich

Verification and Validation Application Engineer, Munich

We are looking for a highly motivated Verification and Validation Application Engineer.  The role will be responsible for hardware assisted verification and application-level validation of new microcontrollers and will be an active member of the product development team. In cooperation with simulation based silicon verification and validation efforts, the role will significantly contribute to achieving 1st pass silicon success.

The role of the Verification and Validation Application Engineer will include:

 

  • Achieving correct functionality according to specification for new microcontroller designs by detecting functional failures early before tape-out of the device
  • Developing verification and validation plans in cooperation with IC design, engineering, and application teams
  • Synthesis of microcontroller designs from an RTL description to the gate level hardware on the FPGA based verification system and simulate the microcontroller RTL and validate the synthesized FPGA hardware for correctness
  • Developing and implementing application oriented verification tests and executing test cases in real time on and check-out correct functionality. Verify microcontroller firmware and driver software before tape-out
  • Functional validation of 1st silicon samples according to the validation plan
  • Building customer like applications with new microcontrollers in order to stress the new devices in a real life environment
  • Supporting external customers by realizing their application on a FPGA based prototype before silicon is available

 

We are searching for a Verification and Validation Application Engineer with the following profile:

  • Good academic background
  • At least 3 years of professional experience in one or more of the following areas:
    • Hardware/FPGA-assisted verification of integrated circuits, ZeBu is a plus
    • Microcontroller architectures
    • Microcontroller application development
    • Assembler, C language and VHDL/Verilog programming
    • Functional verification methods, like random, formal and directed verification
    • Team player with strong communication skills
    • Good English language abilities
    • Demonstrated proactive attitude and willingness to drive for results

Verification and Validation Application Engineer, Munich

 

 

 

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